Various data communications networks have been developed to link together a plurality of bar code scanners, so as to permit these scanners to communicate with a host device through a single communications port. In this manner, data generated by any of the bar code scanners may be retrieved at the host device. An example of a typical prior art data communications network is shown in FIG. 1. For purposes of illustration, the hardware configuration of FIG. 1 uses several different types of scanners, including a slot scanner 123, a hand scanner 125, and a counter scanner 127. Each of these scanners is powered by a corresponding power supply 117, 119, 121, respectively.
Each scanner is connected to a corresponding network communication device which allows the scanner to transfer its data to the network in an orderly and controlled manner. Slot scanner 123 is connected to network communication device 103, hand scanner 125 is connected to network communication device 105, and counter scanner 127 is connected to network communication device 107. Network communication device 103 is powered by power supply 111, network communication device 105 is powered by power supply 113, and network communication device 107 is powered by power supply 115. Communication devices 103, 105, and 107 are coupled through network wiring to a network controller 101 which manages communications on the network and initiates the uploading of data from all of the scanners 123, 125, 127 via corresponding network communication devices 103, 105, 107. The network controller 101 sends accumulated uploaded data to the host device. This accumulated data may be sent to the host device using any of a plurality of known data formats, and using any of a plurality of known data transmission methods, depending upon the specifics of a given system application. Network controller 101 is powered by power supply 109.
In the configuration of FIG. 1, each network communication device is designed to operate independently of the scanner to which it is connected. Thus, network communication device 103 is equipped to operate independently of slot scanner 123, network communication device 105 is equipped to operate independently of hand scanner 125, and network communication device 107 is equipped to operate independently of counter scanner 127. This independent operation makes it necessary to utilize separate power supplies 117, 119, 121 for each of the scanners, as well as separate power supplies 111, 113, 115 for each of the network communication devices. More importantly, however, it is necessary to provide each network communication device 103, 105, 107 with some type of a processing mechanism, such as a microprocessor and any associated program and data memory devices required to manage communications between a respective scanner 123, 125, 127 and its corresponding network communications device 103, 105, 107.
The use of "intelligent" network communications devices, each having separate power supplies and separate processing mechanisms, adds unnecessary expense and complexity to network communication devices 103, 105, 107. By way of example, refer to FIG. 2A which is a hardware block diagram setting forth an illustrative network communication device 203 for interfacing a scanner 201 with a communications network. Scanner 201 includes a photocell 205 coupled to a signal processor 207. Signal processor 207 amplifies, filters, and processes the output of the photocell 205 so that the processed signal is in a form suitable for digitization by digitizer 209. The digitized signals are sent to a scanner processing mechanism that includes a microcontroller 215, program memory 211, data memory 213, and a communications interface 217.
The communications interface 217 of scanner 201 is connected to another communications interface 225 in the network communication device 203. Network communication device 203 also includes a microcontroller 223, program memory 219, and data memory 221. Both the network communication device 203 and the scanner 201 are "intelligent" in the sense that both contain processing mechanisms. Such a hardware configuration is inherently inefficient, because it requires the use of two separate microcontrollers 215, 223, two separate program memories 211, 219, and two separate data memories 213, 221. Moreover, the use of multiple processing mechanisms, such as microcontrollers 215, 223, adds significantly to the cost and complexity of the overall system.